Compile-time scheduling of precedence-constrained task graphs onto interconnection-constrained heterogenous processor architecture / by Siva Kumar Dandamudi. 1995.

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Compile-time scheduling of precedence-constrained task graphs onto interconnection-constrained heterogenous processor architecture / by Siva Kumar Dandamudi. 1995.

http://www.worldcat.org/oclc/428737005

vii, 40 leaves.

University of Houston, Clear Lake, Alfred R. Neumann Library

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SNAC Resource ID: 7481653

University of Houston, Clear Lake, Alfred R. Neumann Library

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University of Houston--Clear Lake. School of Natural and Applied Sciences.

http://n2t.net/ark:/99166/w6tr6sgx (corporateBody)

Dandamudi, Siva Kumar.

http://n2t.net/ark:/99166/w6q60nr4 (person)